Patent Pending • UK Deep Tech

The First
AI OS

Oneirix is building the complete stack for verifiable self-improving AI.
Powered by our state-of-the-art photonic chip.

100×
Energy Efficiency
1000×
Lower Latency
4,032
Photonic MZIs

Built to Last. Built to Scale.

Our patented topological design eliminates the manufacturing defects that have held back photonic computing for decades. The result: chips that work straight from the foundry, dramatically reducing cost and time-to-market.

Die Size

5.5 × 5.5 mm

Channels

64

Foundry

220nm SOI

Status

DRC Clean ✓

AI's Biggest Problem: Power

Training a single large AI model can consume as much electricity as 100 homes use in a year. GPUs are hitting a wall. We're building the alternative.

💡

Light Instead of Electrons

We compute using photons — particles of light — which move data with almost zero heat loss. No cooling required.

Instant Computation

Matrix operations happen at the speed of light — millions of times faster than electronic processors.

🔋

100× More Efficient

A single P-TPU replaces racks of GPUs while using less power than a laptop charger.

GPU
300W
P-TPU
<3W

The Future of Self-Improving AI

True artificial intelligence requires more than raw compute. It needs the ability to improve itself, verify its own reasoning, and remain under human control. We're building all three layers.

Metacognition Layer

RSSI-C

The AI That Knows When It Doesn't Know

Metacognition for machines. RSSI-C gives AI the ability to think about its own thinking — detecting hallucinations before they happen. Using complex-valued neural networks, we measure phase coherence across an ensemble of models. When neurons fire in sync, the output is reliable. When they diverge, the AI knows to say "I'm not sure."

Self-Awareness via Phase Coherence
Geometric Hallucination Detection
Four-State Reliability Classification
Native Optical Interference on P-TPU
0.92 AUC — AI that knows what it knows
Orchestration Layer

ONEIROS

Unlimited Context AI Orchestration

The brain that never stops learning. ONEIROS maintains a World Model of the environment, coordinates tasks through Hierarchical Task Networks, and operates in biological wake/sleep cycles. During sleep, it simulates improvement trajectories through a Branching World Model — then presents proposed changes to humans via the Dream Log.

World Model + Task Orchestrator
Biological Sleep Architecture
Dream Log Human Approval
Branching World Simulation
4 Phase sleep cycle: Replay → Simulate → Validate → Propose
Hardware Layer

P-TPU

Photonic Tensor Processing Unit

The world's first self-improving photonic processor. Weights are stored as physical crystallization states in Sb₂Se₃ phase-change material. Learning happens through thermodynamic energy minimization. A "Dream Log" interface ensures no self-modification occurs without human approval.

Biological Sleep Architecture
On-Chip Self-Improvement
Dream Log Safety Control
<3W Total power consumption

Wake Phase: Inference Flow

1

P-TPU computes at the speed of light through photonic interference, preserving phase information.

2

ONEIROS orchestrates task decomposition and routes to specialized models via HTN planning.

3

RSSI-C validates every output by measuring phase coherence — catching hallucinations natively.

4

Experience logged to buffer for later consolidation during the sleep cycle.

Sleep Phase: Self-Improvement Cycle

1

Experience Replay — Consolidate wake-phase experiences through equilibrium propagation on P-TPU.

2

Branching Simulation — ONEIROS generates hypotheses and simulates N improvement trajectories M steps ahead.

3

RSSI-C Validation — Check coherence, intent alignment, and safety constraints. Reject unsafe proposals.

4

Dream Log — Present validated proposals to humans. No modification executes without explicit approval.

Roadmap to 2030

From validated design to the AI infrastructure of tomorrow.

2025 Q4 — Complete ✓

Design Validation

Architecture specification v2.1 validated. GDSII layout DRC-clean. SVD Compiler achieving machine-precision accuracy.

2026 Q1-Q2

Foundry Tape-Out

PDK integration with CORNERSTONE/IMEC. First MPW run submission. UK Patent filing completed.

2026 Q4

First Silicon

Receive fabricated chips. Optical characterization and validation. Demonstrate MNIST inference on real hardware.

2028

Production Platform

Second-generation P-TPU with 256×256 channels. Partner integrations for data center deployment.

2030

The AI OS

Full photonic AI coprocessor ecosystem. In-situ training capability. The new standard for sustainable AI infrastructure.

P-TPU v2.1 Technical Data

All parameters verified through rigorous simulation and DRC validation.

Matrix Size

64 × 64

Channels per layer

Total MZIs

4,032

Phase shifters

PCM Cells

64

Non-volatile weights

Precision

6-8 bit

Weight resolution

Path Loss

9.9 dB

Total optical loss

Thermal Stability

±2 K

No active cooling

Phase Coherence

<0.003 rad

Residual error

DRC Status

26/26

Rules passed ✓

Build the Future With Us

We're seeking strategic partners and investors to bring Oneirix's verifiable self-improving AI from validated design to first silicon.